Electron-Induced Single Event Upsets in 28 nm and 45 nm Bulk SRAMs
نویسندگان
چکیده
منابع مشابه
Comparative Study on Leakage Current of Power-Gated SRAMs for 65-nm, 45-nm, 32-nm Technology Nodes
In this paper, we compare four SRAM circuits. They are the conventional SRAM1, the SRAM2 with power switches on VSS line, the SRAM3 with switches on VDD line, and the SRAM4 with switches on both VDD and VSS lines, respectively. Among the four SRAMs, the SRAM2 shows the smallest amount of leakage, because its subthreshold leakage is most suppressed by its BODY and Drain-Induced Barrier Lowering ...
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www.xilinx.com 1 © Copyright 2012 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Occasionally, electronic devices exhibit erroneous behavior for no apparent reason. Through careful exper...
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ژورنال
عنوان ژورنال: IEEE Transactions on Nuclear Science
سال: 2015
ISSN: 0018-9499,1558-1578
DOI: 10.1109/tns.2015.2496967